This invention relates to fault simulation of digital circuits, and more particularly to structure for physical fault simulation of connections between digital circuits.
A technique for simulating faults in digital circuits known as physical fault simulation, consists of selecting a connection from a digital network comprising a plurality of connections and forcing said selected connection to one of the logic levels. Said selected connection is forced to said logic level, thus simulating a fault, while input test patterns are applied at the digital network inputs in order to determine whether or not the digital network response to the input test patterns in the presence of said simulated fault is different than that of the digital network response without said simulated fault.
Physical fault simulation of a large digital network, comprising thousands of digital circuits and tens of thousands of connections between said digital circuits, is complicated by the fact that at least one connection has to be selected from said tens of thousands of connections in order to force said selected connection to one of the logic levels, independent of what the normal logic level may be on said selected connection. In order to speed up the physical fault simulation activity, selecting a connection and injecting a fault in said selected connection should be performed at speeds comparable to those at which input data can be applied to said digital circuits.
Known prior art has suggested the use of connection selection and fault injection techniques for performing physical fault simulation of digital circuits. However, in some of the known prior art cases, fault injection increases the power dissipated in the digital circuits associated with the connection at which a fault is injected, thus running into the danger of damaging said digital circuits. In other known prior cases, connection selection and fault injection is accomplished at speeds much slower than those at which input data can be applied, thus extending physical fault simulation in excessive time.